{"id":417036,"date":"2024-10-20T06:14:00","date_gmt":"2024-10-20T06:14:00","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-61182-2-22012-2\/"},"modified":"2024-10-26T11:35:21","modified_gmt":"2024-10-26T11:35:21","slug":"bs-en-61182-2-22012-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-61182-2-22012-2\/","title":{"rendered":"BS EN 61182-2-2:2012"},"content":{"rendered":"
This part of IEC 61182 provides the information on the manufacturing requirements used for fabricating printed boards. This standard determines the XML schema details, defined in the generic standard IEC 61182-2 and some of the sectional standards that are required to accomplish the focused tasks. When other standards are invoked, their requirements become a mandatory part of the fabrication details as defined in the IEC 61182-2.<\/p>\n
The IEC 61182-2 contains all the requirements necessary to build an electronic product. The cardinality indicated in the IEC 61182-2 may be superseded by a restriction of an attribute (enumerated string ID) or indication of a requirement that is noted as being optional in the generic standard. However, this standard renders the requirement mandatory based on the supply chain communication need.<\/p>\n
In order to assist the users of this standard, all the applicable XML schema elements that apply to the board fabrication function are listed in Annex A. The list is grouped by topics and shows the absolute path for the elements that pertain to the focus of this standard. If the parent element is not present no children are considered in the implementation either. However, all attributes identified for a particular element follow the cardinality of the IEC 61182-2, unless a restriction is stated in this standard.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
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6<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions <\/td>\n<\/tr>\n | ||||||
9<\/td>\n | 4 General principles 4.1 Requirements 4.2 Interpretation <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | 4.3 Categories and content Tables Table 1 \u2013 Function relationship of an IEC\u00a061182-2-2 fabrication file <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | 5 General rules 5.1 Overview Figures Figure 1 \u2013 Board fabrication data relationship <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | 5.2 File content descriptions 5.3 Logistic descriptions 5.4 File history descriptions 5.4.1 General <\/td>\n<\/tr>\n | ||||||
13<\/td>\n | 5.4.2 HistoryRecord use case \u2013 Initial design release Figure 2 \u2013 HistoryRecord use case <\/td>\n<\/tr>\n | ||||||
14<\/td>\n | 5.4.3 Supply chain modifications <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | 5.4.4 OEM reviews modifications \u2013 HistoryRecord update 5.5 BOM (board fabrication materials) <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | Table 2 \u2013 Bom restrictions Table 3 \u2013 Recommended reference designators for printed board material <\/td>\n<\/tr>\n | ||||||
18<\/td>\n | 5.6 AVL (board material suppliers) 5.7 Documentation layers 5.7.1 General 5.7.2 Documentation layer restrictions Table 4 \u2013 Avl restrictions <\/td>\n<\/tr>\n | ||||||
19<\/td>\n | 5.7.3 Reference to documentation Table 5 \u2013 Documentation layer restrictions Table 6 \u2013 General descriptions of documentation layer functions <\/td>\n<\/tr>\n | ||||||
20<\/td>\n | 5.7.4 Step usage Figure 3 \u2013 Documentation package grade requirements Table 7 \u2013 Relationship to documentation standard <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | 5.7.5 Set 5.8 Design for excellence (Dfx) analysis 5.8.1 General 5.8.2 DfxMeasurement 5.9 Miscellaneous image layers 5.9.1 General <\/td>\n<\/tr>\n | ||||||
22<\/td>\n | 5.9.2 Step usage 5.10 Packages and land patterns 5.10.1 General 5.10.2 Step usage for component packages and land patterns Table 8 \u2013 Miscellaneous layer restrictions <\/td>\n<\/tr>\n | ||||||
23<\/td>\n | 5.10.3 Land pattern details 5.11 Solder mask and legend layers 5.11.1 General 5.11.2 Solder mask details 5.11.3 Legend details <\/td>\n<\/tr>\n | ||||||
24<\/td>\n | 5.11.4 Step usage for solder mask and legend layers 5.12 Drilling and routing (tooling) layers 5.12.1 General 5.12.2 Drilling details 5.12.3 Routing details <\/td>\n<\/tr>\n | ||||||
25<\/td>\n | 5.12.4 Step usage for drilling and routing 5.13 Net list 5.13.1 General <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 5.13.2 Step usage for net list 5.14 Outer conductive layers 5.14.1 General 5.14.2 Outer conductive layer details 5.14.3 Step usage for outer conductive layers <\/td>\n<\/tr>\n | ||||||
27<\/td>\n | 5.15 Inner conductive layers 5.15.1 Requirement 5.15.2 Inner conductive layer details 5.15.3 Step usage for inner conductive layers 5.16 Board construction 5.16.1 Requirement <\/td>\n<\/tr>\n | ||||||
28<\/td>\n | 5.16.2 Board construction details 5.16.3 Step usage for board construction 6 Modeling 6.1 General <\/td>\n<\/tr>\n | ||||||
29<\/td>\n | 6.2 Information models Figure 4 \u2013 Fabrication steps data model example <\/td>\n<\/tr>\n | ||||||
30<\/td>\n | 7 Report generators 7.1 IEC\u00a061182-2-2 format Figure 5 \u2013 IPC-2584 UML data model <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 7.2 Hole usage report 7.3 Pad usage report 7.4 Conductor usage report 8 Glossary <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | Annex A (normative) Printed board fabrication schema <\/td>\n<\/tr>\n | ||||||
44<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Printed board assembly products. Manufacturing description data and transfer methodology – Sectional requirements for implementation of printed board fabrication data description<\/b><\/p>\n |