IEC 62751-2:2014 gives the detailed method to be adopted for calculating the power losses in the valves for an HVDC system based on the “modular multi-level converter”, where each valve in the converter consists of a number of self-contained, two-terminal controllable voltage sources connected in series. It is applicable both for the cases where each modular cell uses only a single turn-off semiconductor device in each switch position, and the case where each switch position consists of a number of turn-off semiconductor devices in series (topology also referred to as “cascaded two-level converter”). The main formulae are given for the two-level “half-bridge” configuration but guidance is also given as to how to extend the results to certain other types of MMC building block configuration.<\/p>\n
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|---|---|---|---|---|---|---|---|
| 4<\/td>\n | Foreword Endorsement notice <\/td>\n<\/tr>\n | ||||||
| 5<\/td>\n | Annex ZA (normative) Normative references to international publications with their corresponding European publications <\/td>\n<\/tr>\n | ||||||
| 6<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
| 9<\/td>\n | 1 Scope 2 Normative references 3 Terms, definitions, symbols and abbreviated terms <\/td>\n<\/tr>\n | ||||||
| 10<\/td>\n | 3.1 Terms and definitions <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | 3.2 Symbols and abbreviated terms 3.2.1 Valve and simulation data <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | 3.2.2 Semiconductor device characteristics 3.2.3 Other component characteristics 3.2.4 Operating parameters <\/td>\n<\/tr>\n | ||||||
| 13<\/td>\n | 3.2.5 Loss parameters 4 General conditions 4.1 General <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | 4.2 Principles for loss determination 4.3 Categories of valve losses <\/td>\n<\/tr>\n | ||||||
| 15<\/td>\n | 4.4 Loss calculation method 4.5 Input parameters 4.5.1 General 4.5.2 Input data for numerical simulations <\/td>\n<\/tr>\n | ||||||
| 16<\/td>\n | 4.5.3 Input data coming from numerical simulations 4.5.4 Converter station data <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | 4.5.5 Operating conditions 5 Conduction losses 5.1 General Figures Figure 1 \u2013 Two basic versions of MMC building block designs <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | 5.2 IGBT conduction losses Figure 2 \u2013 Conduction paths in MMC building blocks <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | 5.3 Diode conduction losses <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | 5.4 Other conduction losses <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | 6 DC voltage-dependent losses 7 Losses in d.c. capacitors of the valve <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | 8 Switching losses 8.1 General 8.2 IGBT switching losses <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | 8.3 Diode switching losses 9 Other losses 9.1 Snubber circuit losses <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | 9.2 Valve electronics power consumption 9.2.1 General <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | 9.2.2 Power supply from off-state voltage across each IGBT 9.2.3 Power supply from the d.c. capacitor <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | 10 Total valve losses per HVDC substation <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | Tables Table 1 \u2013 Contributions to valve losses in different operating modes <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | Annex A (informative) Description of power loss mechanisms in MMC valves A.1 Introduction to MMC Converter topology <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | Figure A.1 \u2013 Phase unit of the modular multi-level converter (MMC) in basic half-bridge, two-level arrangement, with submodules <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | Figure A.2 \u2013 Phase unit of the cascaded two-level converter (CTL) in half-bridge form <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | A.2 Valve voltage and current stresses A.2.1 Simplified analysis with voltage and current in phase Figure A.3 \u2013 Basic operation of the MMC converters <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | A.2.2 Generalised analysis with voltage and current out of phase Figure A.4 \u2013 MMC converters showing composition of valve current <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | A.2.3 Effects of third harmonic injection Figure A.5 \u2013 Phasor diagram showing a.c. system voltage, converter a.c. voltage and converter a.c. current <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | A.3 Conduction losses in MMC building blocks A.3.1 Description of conduction paths Figure A.6 \u2013 Effect of 3rd harmonic injection on converter voltage and current <\/td>\n<\/tr>\n | ||||||
| 35<\/td>\n | Figure A.7 \u2013 Two functionally equivalent variants of a \u201chalf-bridge\u201d, two-level MMC building block <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Figure A.8 \u2013 Conducting states in \u201chalf-bridge\u201d, two-level MMC building block <\/td>\n<\/tr>\n | ||||||
| 37<\/td>\n | Figure A.9 \u2013 Typical patterns of conduction for inverter operation (left) and rectifier operation (right) <\/td>\n<\/tr>\n | ||||||
| 38<\/td>\n | Figure A.10 \u2013 Example of converter with only one MMC building block per valve to illustrate switching behaviour Figure A.11 \u2013 Inverter operation example of switching events <\/td>\n<\/tr>\n | ||||||
| 39<\/td>\n | Figure A.12 \u2013 Rectifier operation example of switching events <\/td>\n<\/tr>\n | ||||||
| 40<\/td>\n | A.3.2 Conduction losses in semiconductors <\/td>\n<\/tr>\n | ||||||
| 41<\/td>\n | Figure A.13 \u2013 Valve current and mean rectified valve current <\/td>\n<\/tr>\n | ||||||
| 44<\/td>\n | A.3.3 MMC building block d.c. capacitor losses A.3.4 Other conduction losses A.4 Switching losses A.4.1 Description of state changes Table A.1 \u2013 Hard switching events <\/td>\n<\/tr>\n | ||||||
| 45<\/td>\n | Figure A.14 \u2013 IGBT and diode switching energy as a function of collector current <\/td>\n<\/tr>\n | ||||||
| 46<\/td>\n | A.4.2 Analysis of state changes during cycle A.4.3 Worked example of switching losses Table A.2 \u2013 Soft switching events <\/td>\n<\/tr>\n | ||||||
| 47<\/td>\n | Figure A.15 \u2013 Valve voltage, current and switching behaviour for a hypothetical MMC valve consisting of 5 submodules <\/td>\n<\/tr>\n | ||||||
| 48<\/td>\n | Table A.3 \u2013 Summary of switching events from Figure A.15 <\/td>\n<\/tr>\n | ||||||
| 49<\/td>\n | A.5 Other losses A.5.1 Snubber losses A.5.2 DC voltage-dependent losses <\/td>\n<\/tr>\n | ||||||
| 52<\/td>\n | A.5.3 Valve electronics power consumption Figure A.16 \u2013 Power supply from IGBT terminals <\/td>\n<\/tr>\n | ||||||
| 53<\/td>\n | Figure A.17 \u2013 Power supply from IGBT terminals in cell <\/td>\n<\/tr>\n | ||||||
| 54<\/td>\n | A.6 Application to other variants of valve A.6.1 General A.6.2 Two-level full-bridge MMC building block Figure A.18 \u2013 Power supply from d.c. capacitor in submodule Figure A.19 \u2013 One \u201cfull-bridge\u201d, two-level MMC building block <\/td>\n<\/tr>\n | ||||||
| 55<\/td>\n | A.6.3 Multi-level MMC building blocks <\/td>\n<\/tr>\n | ||||||
| 56<\/td>\n | Figure A.20 \u2013 Four possible variants of three-level MMC building block <\/td>\n<\/tr>\n | ||||||
| 57<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Power losses in voltage sourced converter (VSC) valves for high-voltage direct current (HVDC) systems – Modular multilevel converters<\/b><\/p>\n |